Analog to Digital Converters (ADCs) are employed in many technological areas. For example, an ADC may be employed to convert sound entering a microphone or light entering a receiver into a digital signal that can be stored and processed by a digital computing system. The conversion of an analog signal to a digital signal involves mapping a first set of values to a smaller second set of values, also known as quantization. Such quantization involves some level of truncation and/or rounding, which results in quantization error. Further, other ADC circuitry may inject noise into the signal during operation. Such error and noise negatively impact the Signal to Noise Ratio (SNR) of the ADC. Further, ADCs may operate in low power environments, for example when employed in systems operating from a battery. ADC circuits designed to maintain a high SNR for high quality conversion may drain significant power. Accordingly, balancing power consumption and SNR may dictate ADC design choices. Design choices that decrease power consumption without significantly decreasing SNR, or vice versa, may be beneficial.